Last modified: Sat Jun 20 16:34:45 UTC+0200 2026 © A. Tarpai
About Segmentation in Intel processors
On the hardware level, segmentation means that every memory address goes through additional segment registers, external to the program, holding a physical address base and possible protection bits for the final address:
CPU PROTECTION
+----------------------+ +--------------------|---+
| | | ______________ _|_ |
| Memory address -----|----|-> |___BASE_______|___| | --------> physical
| | | | address
| | | SEGMENT REGISTER |
| | | |
+----------------------+ +------------------------+
Segment Unit
with adder
For Intel processors, since 8086 from 1978, the Segment Unit is on-chip.
Comparing 8086/286/386 segmentation
Note that Address space extension and Protection is essentially unrelated. Eg. the 16-bit 8086 used segment registers for memory space extension only. The 32-bit 386 has the same memory segmentation scheme, but does not need segment registers for memory space extension:
| Instruction address space | Segment address space | Address space extension | Protection | Modular programming | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 8086 | 64K (16-bit) | 1M (20-bit) | YES × 16 | NO | CS | DS | SS | ES | |||
| 80286 | 64K (16-bit) | 16M (24-bit) | YES × 256 | YES | CS | DS | SS | ES | |||
| 80386 | 4G (32-bit) | 4G (32-bit) | NO | YES | CS | DS | SS | ES | FS | GS | |
- 8086. 16-bit cpu with address extension to 1M using segment registers
- 80286. 16-bit cpu binary compatible with 8086. Adds 16-bit proteced mode with address extension to 16MB (24-bit segment base and protection in segment registers)
- 80386. 32-bit cpu binary compatible with 286. Adds 32-bit proteced mode. 16/32-bit orthogonal mixed mode (66/67h). 32-bit address space to 4GB. 32-bit segment base registers.
Segmentation for Address space extension
When the base register is wider, than the instruction's address – just like in the Intel 8086 design in 1979 – the final address can be allocated in a larger address space.
The segment unit adds the base value to every instruction's memory address to form the final address.
Segment registers can be used for address space extension.
Combined with additional physical address lines on the CPU the maximum addressable memory is extended. See 8086.
Segmentation for Protection
By implementing protection, eg. readable/writable/executable bits or limit ranges, every memory access can be guarded by hardware on-the-fly. The Intel 8086 did not implement any protection. It was the 286 p-mode addition first.
Segmentation as virtual memory management
Using segmentation, programs do not reference physical memory addresses at all, but a logical or virtual address. Just a memory offset. The external segment adder will provide the final physical address. This gives possibility for memory management.
Segmentation for modular programming: a mini MMU
The memory segmentation scheme is mostly designed for modular programming. Normally, program instructions encode references to code-, data- and stack memory locations.
By setting up different base values in segment registers, a program module can be loaded and run anywhere in the physical address space without relocation, or the same program module can be loaded into memory in multiple instances. Physical memory ranges can be made private to th program or shared with other modules. The OS can decide and set up segment register base values for each program module to run, save/restore the program's segment registers' content on task switch etc:
MEMORY
+-------------+
| |
| |
+----> | DATA | <----+
| | | |
+----> |code1 | |
program | | | |
module 1 -----+ | data2| <----+
| | | |
+----> |stack1 | | program
| | | +--- module 2
+----> |data1 | |
| | |
| | |
| stack2| <----+
| | |
| code2| <----+
| |
+-------------+
Segmentation is a kind of mini-virtual-memory-management-system, a simple and fast on-chip MMU.